ISSCC Historical Data Visualization

I maintain this dataset based on hardware designs and characterization results published in the IEEE International Solid State Circuits Conference (ISSCC), as well as a few publications from the IEEE Journal on Solid State Circuits.

For each publication on a programmable digital processor in the ISSCC conference from circa 1980, I manually extract information such as die size, transistor count, number of power supply pins, number of I/O pins, and so on, by reading the paper. (The data is thus sourced independently of the Stanford CPUdb dataset, a much larger, processor-performance-focused dataset curated by Mark Horowitz's group.) The Mathematica plugin below allows you to plot any of the parameters in the dataset against any other. 

In addition, I also provide a dynamic visualization for the Stanford CPUdb dataset.

Cite this as:

   author = {Stanley-Marbell, Phillip and Caparros Cabezas, Victoria and Luijten, Ronald},
   title = {Pinned to the Walls: Impact of Packaging and Application Properties on the Memory and Power Walls},
   booktitle = {Proceedings of the 17th IEEE/ACM International Symposium on Low-power Electronics and Design},
   year = {2011},
   pages = {51--56},